Mark van Renswoude
4c16260e55
Added switchable shift register order Added potentiometer-controlled delay for demonstration purposes
44 lines
741 B
Plaintext
44 lines
741 B
Plaintext
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Top view
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D1 A F D2 D3 B
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__|__|__|__|__|__|__
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|__ __ __ __ __ _____|
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E D DP C G
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Bottom view
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B D3 D2 F A D1
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__|__|__|__|__|__|__
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|_____ __ __ __ __ __|
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G C DP D E
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Pin Assignment
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1 E Bottom Left
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2 D Bottom
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3 DP Dot point
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4 C Bottom Right
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5 G Middle
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6 B Top Right
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7 D3 Digit 3 anode (Right)
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8 D2 Digit 2 anode (Middle)
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9 F Top Left
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10 A Top
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11 D1 Digit 1 anode (Left) |