Mark van Renswoude
4c16260e55
Added switchable shift register order Added potentiometer-controlled delay for demonstration purposes
33 lines
665 B
Plaintext
33 lines
665 B
Plaintext
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O1 O2 O3 O4 O5 O6 O7 O8 GND
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__|____|____|____|____|____|____|____|____|__
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|__ ____ ____ ____ ____ ____ ____ ____ ____ __|
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I1 I2 I3 I4 I5 I6 I7 I8 VCC
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Pin Assignment
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1 I1
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2 I2
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3 I3
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4 I4
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5 I5
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6 I6
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7 I7
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8 I8
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9 VCC
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10 GND Ground
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11 O8
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12 O7
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13 O6
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14 O5
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15 O4
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16 O3
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17 O2
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18 O1 |